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| TC6371AF Specification Rev. 1.8 02/01/22 PCI to SD Memory Card / SmartMediaTM Interface Controller TC6371AF Outline Rev. 1.8 2002-01-22 TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.1 TC6371AF Specification Revision history TITLE: TC6371AF Specification REV NO. 1.00 1.01 1.02 1.03 DATE '00-09-08 '01-03-26 '01-04-02 '01-04-18 Issued Mentioned `5.2.2PCI Interface DC Characteristics'. Mentioned `5.3.1PCI clock AC characteristics'. Symbol `Topr' is raised to 70C from 60C Ta is changed to `0-70C' from `0-60C' Recommended resistance of SDCD3 line is changed to 100 KPull-up from 510 KPull-down. Added 4.11 item Low active signals are unified as #xxxx. (ex. SDCD# #SDCD) Modified recommended resistance of SDCD3-0 and SDCMD case of MMC not supported. (100K 47K) Modified a comment of [4.7 SUSPEND State ]. Modified recommended resistance of SDCD2-0 and SDCMD case of MMC not supported. (47K 100K) Added Current Dissipation Characteristics Added [4.12 Processing Unused Interface External Pins]. Modified recommended resistance of #SDCD and SDWP. (100K 10K) Added [6 Package outline]. Added SmartMedia DC spec. for #SMLOCK, #SMEJCT and #SMLED. To be slimed files. Added the comment regarding Subsystem Vendor ID and Subsystem Device ID. Corrected the written. Corrected the written. Regarding serial rom I/F, specified that only 4K bits serial rom be supported. Added #SMLED signal specification. Modified the explanation of CLK32 signal. Added GPIO interface specification. Page 34 Page 40 Page 33 Page 35-52 Page 32 Page 33 CONTENTS Parts Rev. 1.8 02/01/22 REVISED S.Ueta T.Murakami S.Ueta S.Ueta APP'D T.Takada T.Takada T.Takada T.Takada 1.04 '01-04-25 S.Ueta Page 32 T.Takada 1.1 '01-05-17 Page 26 Page 32 S.Ueta T.Takada 1.2 '01-07-20 Page 41 Page 34-35 Page 32 Page 56 Page 38 S.Ueta T.Takada 1.3 1.4 1.5 1.6 1.61 1.62 1.7 '01-08-17 '01-08-31 '01-09-03 '01-10-02 '01-11-09 '01-11-26 '02-01-09 S.Ueta S.Ueta S.Ueta T.Takada T.Takada T.Takada T.Takada T.Takada T.Takada T.Takada Page17,19 Page17,19 (red letters) Page27 (red letters) Page5 (red letters) Page36 Page21 (red letters) Page36 S.Ueta S.Ueta S.Ueta S.Ueta 1.8 '02-01-22 S.Ueta T.Takada TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.2 TC6371AF Specification Contents 1 Rev. 1.8 02/01/22 Outline ___________________________________________________________________________________ 5 1.1 1.2 1.3 Chip Specifications ______________________________________________________________________ 5 Low power dissipation ___________________________________________________________________ 5 General Specifications ___________________________________________________________________ 5 2 3 Block diagram______________________________________________________________________________ 6 Signals ___________________________________________________________________________________ 7 3.1 3.2 3.3 3.4 Pin Assignments ________________________________________________________________________ 7 Pin Signals ____________________________________________________________________________ 8 Power Supply, GND, and NC Pins (26) _____________________________________________________ 14 Interface Pin Summary __________________________________________________________________ 14 4 Description of Functions_____________________________________________________________________ 15 4.1 PCI Device Interface____________________________________________________________________ 15 4.1.1 Resource Space ____________________________________________________________________ 15 4.2 Register Map__________________________________________________________________________ 4.2.1 SD Host Controller Configuration Register ______________________________________________ 4.2.2 SD Control Register ________________________________________________________________ 4.2.3 SmartMediaTM Host Controller Configuration Register _____________________________________ 4.2.4 SmartMediaTM Control Register _______________________________________________________ 17 17 18 19 20 4.3 Clock / Reset__________________________________________________________________________ 21 4.3.1 Clocks ___________________________________________________________________________ 21 4.3.2 Reset ____________________________________________________________________________ 21 4.4 Detection of Insertion/Removal of SD Card/ SmartMediaTM _____________________________________ 22 4.4.1 Detection of Insertion/Removal of SD Card ______________________________________________ 22 4.4.2 Detection of Insertion/Removal of SmartMediaTM _________________________________________ 22 4.5 Interrupts_____________________________________________________________________________ 23 4.5.1 Interrupt Sources by SD Card _________________________________________________________ 23 4.5.2 Interrupt Sources by SmartMediaTM ____________________________________________________ 23 4.6 Card Slot Power Supply Control___________________________________________________________ 24 4.6.1 SD Card Slot Power Supply Control____________________________________________________ 24 4.6.2 SmartMediaTM Slot Power Supply Control_______________________________________________ 24 4.7 Suspend State _________________________________________________________________________ 25 26 26 26 27 28 28 29 30 4.8 Power Management ____________________________________________________________________ 4.8.1 PME Register Structure _____________________________________________________________ 4.8.2 PME State ________________________________________________________________________ 4.8.3 PME Context Register ______________________________________________________________ 4.8.4 #PME Generation __________________________________________________________________ 4.8.5 #PME Pin ________________________________________________________________________ 4.8.6 #PWRST _________________________________________________________________________ 4.8.7 Vaux in D3cold State _______________________________________________________________ 4.9 Serial ROM Interface ___________________________________________________________________ 31 4.10 Pulled-Up/Pulled-Down Resistors _______________________________________________________ 32 4.10.1 SD Card Interface __________________________________________________________________ 32 4.10.2 SmartMediaTM Interface _____________________________________________________________ 32 4.11 Connection example of SD Card/SmartMediaTM socket _________________________________________ 33 TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.3 TC6371AF Specification Rev. 1.8 02/01/22 4.12 Processing Unused InterfaceExternal Pins___________________________________________________ 34 4.12.1 Processing Pins (SmartMediaTM Interface unsupported) _____________________________________ 34 4.12.2 Processing Pins (SD Interface unsupported)_______________________________________________ 35 4.13 4.14 5 #SMLED signal _______________________________________________________________________ 36 GPIO interface specification _____________________________________________________________ 36 Electrical Characteristics ____________________________________________________________________ 37 5.1 Absolute Maximum Ratings ______________________________________________________________ 37 37 37 38 39 39 40 40 41 42 42 43 44 44 48 55 56 5.2 DC Characteristics _____________________________________________________________________ 5.2.1 Power Supply Voltage: Recommended Conditions_________________________________________ 5.2.2 PCI Interface DC Characteristics ______________________________________________________ 5.2.3 SmartMediaTM Interface DC Characteristics______________________________________________ 5.2.4 SmartMediaTM Power Supply Control DC Characteristics ___________________________________ 5.2.5 SD Card Interface Pin DC Characteristics _______________________________________________ 5.2.6 SD Card Power Supply Control DC Characteristics________________________________________ 5.2.7 System Interface Pin (5 V-Tolerant) DC Characteristics ____________________________________ 5.2.8 GPIO Interface Pin DC Characteristics__________________________________________________ 5.2.9 TEST Pin DC Characteristics _________________________________________________________ 5.2.10 Current Dissipation Characteristics ____________________________________________________ 5.3 AC Characteristics _____________________________________________________________________ 5.3.1 PCI Interface Signal AC Characteristics_________________________________________________ 5.3.2 SmartMediaTM Interface Signal AC Characteristics ________________________________________ 5.3.3 SD Card Interface Signal AC Characteristics _____________________________________________ 5.3.4 System Interface Signal AC Characteristics ______________________________________________ 6 Package outline____________________________________________________________________________ 57 TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.4 TC6371AF Specification Rev. 1.8 02/01/22 1 Outline The TC6371AF is an SD memory card/SmartMediaTM controller LSI with a 32-bit PCI bus interface. This product conforms to SD memory card physical layer specifications as well as to SmartMediaTM electrical and physical format specifications. The TC6371AF can also be used with all power supplies for memory card interfaces. When the memory card is inserted, TC6371AF automatically detects the card type and the power supply in use. In addition to supporting a CLKRUN function and advanced configuration power interface (ACPI), the TC6371AF supports a PCI power management-compliant PME, giving the product fully developed power management functions that allow it to minimize the system's power dissipation. With such features as subsystem ID and subsystem vendor ID supplied from external serial ROM, the TC6371AF can be used as a PCI card or CardBus card LSI. 1.1 Chip Specifications * 0.35-m CMOS process * Number of gates: 80,000 approx. * 0.4-mm pitch, 128-pin QFP package (LQFP128-P-1414B) 1.2 Low power dissipation * Conforms to PCI power management specifications (Supports #PME *) * Supports CLOCKRUN (mobile PC/PCI) * Internal gate clock design 1.3 General Specifications View of TC6371AF * Conforms to PCI power management specification revision 1.1 * Conforms to PCI local bus specification revision 2.2 * * Supports remote wakeup feature (#PME-compliant) ** * Supports PCI interrupts (INT) * Supports PCI CLKRUN * Supports suspend state * Supports Plug & Play * Operating frequency: PCI (33 MHz max) * Supports LSI MIC2563 which controls power supply * Supports subsystem ID and subsystem vendor ID from 4k bits EEPROM (3-line serial ROM interface) (Only 4K bits EEPROM supports) * Supports 3.3-V PCI interface * Conforms to SD memory card physical layer specifications (ver. 1.0) Operating frequency 16 MHz max Offers Multimedia card read/write Supports 3.3 V Offers multi-block write/read * Conforms to SmartMediaTM electrical specifications (ver. 1.20) and physical format specifications (ver. 1.20), supporting: Supports 3.3-V SmartMediaTM (5.0 V not supported) Supports hardware ECC * The minimum input voltage level of "PCICLK" "#PCIRST"shall not exceed 0.7 times ofVcc.Vih(min)= 0,7*Vcc **As of January. 2002, the SD/MMC/SmartMediaTM driver does not perform any functions by enabling #PME. SmartMediaTM is a registered trademark of Toshiba Corporation. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.5 TC6371AF Specification Rev. 1.8 02/01/22 2 Block diagram CPU North Bridge PCI Bus SYSTEM MEMORY #PME INTX INTX TC6371AF South Bridge Interrupt Control PCI TARGET Control VGA Power Management ROM Interface Serial ROM Power Control Power Control SD Control Register SD Memory Card Control SmartMediaTM Control Register SmartMediaTM Control Power Switch SD Memory Card MultiMedia Card SmartMediaTM TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.6 TC6371AF Specification Rev. 1.8 02/01/22 3 Signals 3.1 Pin Assignments QFP128 Matrix Diagram 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 VSS SDCLK SMD4 #SMCD SDCD0 SDCD1 VDD #SDCD SDWP #SMEJCT #SMLED VSS #SMLOCK GPIO0 GPIO1 GPIO2 VDD GPIO3 GPIO4 GPIO5 GPIO6 VSS GPIO7 IDSEL1 #INTA #INTB #PCIRST VDD PCICLK NC NC #PME SMD5 SMD3 SMD6 SMD2 VDD SMD7 SMD1 SDCMD SMLVD VSS SMD0 SDCD3 #SMWP SDCD2 #SMRB VDD #SMWE #SMRE SMALE #SMCE VSS SMCLE #SMEJSW #SMWPD SMVC3EN RSVO0 VDD SDPWR ROM_CS ROM_SK ROM_D VSS 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 TC6371AF LQFP128-PKG (TOP VIEW) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 TSTI3 TSTI2 TSTI1 TSTI0 VDD CLK32 FCMODE #SUSPEND #PWRST #CLKRUN VSS AD0 AD1 AD2 AD3 VDD AD4 AD5 AD6 AD7 VSS CBE0 AD8 AD9 AD10 VDD AD11 AD12 AD13 AD14 AD15 VSS TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.7 VSS AD31 AD30 AD29 AD28 VDD AD27 AD26 AD25 AD24 CBE3 VSS IDSEL0 AD23 AD22 AD21 VDD AD20 AD19 AD18 AD17 AD16 VSS #FRAME #IRDY #TRDY #DEVSEL VDD #STOP PAR CBE2 CBE1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TC6371AF Specification Rev. 1.8 02/01/22 3.2 Pin Signals PCI Interface (50-Pin) NAME AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 #CBE3 #CBE2 #CBE1 #CBE0 PAR Pin 2 3 4 5 7 8 9 10 14 15 16 18 19 20 21 22 34 35 36 37 38 40 41 42 45 46 47 48 50 51 52 53 11 31 32 43 30 IO VCC (V) FUNCTION IO 3.3 PCI address/data bus IO 3.3 PCI bus command/byte enable. Specifies bus commands at the PCI cycle address phase. Specifies the byte enable that indicates which byte lane of the 32 bits to use for sending data at the data phase. O 3.3 PCI bus parity. Parity bit for even-number parity checks on the PCI address/data bus and bus command line. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.8 TC6371AF Specification Pin Signals (Continued) PCI Interface (Continued) VCC (V) Rev. 1.8 02/01/22 NAME Pin IO FUNCTION PCI cycle frame. Driven by the initiator, this signal indicates that the bus cycle is in progress. When the signal is asserted, address and bus command output starts. When de-asserted, the signal indicates that the next data transfer phase is the final data transfer. Enables PCI initiator. Indicates that the initiator is ready for data transfer. The R/W data are transferred when signal asserted. Enables PCI target. Indicates that the target is ready for data transfer. The R/W data are transferred when signal asserted. Terminates the PCI cycle. The target uses this signal to ask the initiator to terminate processing that is currently in progress. Supports three types of termination: retry/disconnect/target abort. Selects the PCI bus initialization device (ID). Asserted to specify the TC6371AF as the target device during a configuration access. This signal is used for SD card controller functions. When the FCMODE pin is set to H, this signal is used for the SD card/SmartMediaTM controller multifunction device feature. Selects the PCI bus initialization device (ID). Asserted when the TC6371AF is specified as the target device during configuration access. This signal is used for SmartMediaTM controller functions. When the FCMODE pin is set to H, the TC6371AF operates as a multifunction device using IDSEL0 and therefore this signal does not function. (In Multifunction mode, pull up this pin.) Runs the PCI clock. Can request a stop or slowdown of the PCI clock. Selects the PCI device. Asserted by the TC6371AF in response to bus access. PCI bus clock. Inputs a 33-MHz clock. All processing on the PCI bus is on the PCICLK rising edge. Resets PCI bus. Asserted when power is turned on and or when system has been reset. PCI interrupt INTA. #FRAME 24 I 3.3 #IRDY #TRDY 25 26 I O 3.3 3.3 #STOP 29 O 3.3 IDSEL0 13 I 3.3 IDSEL1 120 I 3.3 #CLKRUN #DEVSEL PCICLK #PCIRST 55 27 125 123 IO O I I O 3.3 3.3 3.3 3.3 #INTA 121 (OD) *1 O 3.3 #INTB 122 (OD) *1 O 3.3 PCI interrupt INTB. #PME 128 (OD) *1 3.3 #PME interrupt signal *1: Level cannot be converted. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.9 TC6371AF Specification Pin Signals (Continued) SD Card Interface (8 pins) NAME SDCD3 SDCD2 SDCD1 SDCD0 SDCMD SDCLK #SDCD SDWP Rev. 1.8 02/01/22 Pin 85 83 102 101 89 98 104 105 IO VCC (V) FUNCTION IO 3.3 SD card data bus IO O I I 3.3 3.3 3.3 3.3 SD command SD card clock SD card detection SD card write-protect. When H, SD card write-protected. SD Card Power Supply Controller (One pin) NAME SDPWR Pin 69 IO O VCC (V) Controls SD card power supply. 3.3 3.3-V enable signal. FUNCTION TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.10 TC6371AF Specification Pin Signals (Continued) SmartMediaTM Interface (22 pins) NAME SMD7 SMD6 SMD5 SMD4 SMD3 SMD2 SMD1 SMD0 SMCLE SMALE #SMCE #SMWE #SMRE #SMWP #SMRB #SMCD SMLVD #SMWPD Rev. 1.8 02/01/22 Pin 91 94 96 99 95 93 90 86 75 78 77 80 79 84 82 100 88 73 IO VCC (V) FUNCTION IO 3.3 Data O (3state) O (3state) O (3state) O (3state) O (3state) O (3state) I I I I Enables the command latch. Enables the address latch. Enables the chip. Enables a write. Enables a read. Protects against write. Busy Detects card. Detects low voltage. Write-protection seal When L, a write-protected media is inserted. Ejects request. When H, a media is inserted. When L, no media is inserted. #SMEJSW 74 I Changes detection control to one where L indicates a media is inserted by setting bit 7 of the SmartMediaTM host controller's configuration register 63h. Turns on the LED. Lock mode Eject response #SMLED #SMLOCK #SMEJCT 107 109 106 O (OD) *1 O (OD) *1 O (OD) *1 *1: Level cannot be converted. SmartMediaTM Power Supply Control (2 pins) NAME SMVC3EN RSVO0 Pin 72 71 IO O O VCC (V) 3.3 3.3 FUNCTION Parallel power supply control. VCC 3.3 V enable signal. Leave pin open. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.11 TC6371AF Specification Pin Signals (Continued) System Interface (4 pins) NAME CLK32 #PWRST #SUSPEND Rev. 1.8 02/01/22 Pin 59 56 57 IO I I I VCC (V) 3.3 3.3 3.3 FUNCTION Detects card or allow interruptions when PCICLK stops. Power-on reset signal input. When #SUSPEND is Low, prevents throughput of data input from the SD card and SmartMediaTM. Control signals output from TC6371AF are controlled at non-active level. Function mode signal. When the FCMODE pin is set to L, the TC6371AF operates as a single-function PCI device. (IDSEL0 is used for the SD card controller functions, IDSEL1 for the SmartMediaTM functions.) When the FCMODE pin is set to H, TC6371AF operates as a multifunction device. (Only IDSEL0 is valid. FUNCTION0 controls the SD card controller functions; FUNCTION1 controls the SmartMediaTM controller functions.) FCMODE 58 I 3.3 Serial ROM Interface (3 pins) NAME Pin IO VCC (V) FUNCTION Serial ROM interface: Chip selection Connect to serial ROM chip select (CS) pin. ROM_CS 68 O 3.3 Set TSTI[3-0] to be "0010" when the serial ROM interface applied. Leave the pin open when the serial ROM interface not applied,. Serial ROM interface: Clock ROM_SK 67 O 3.3 Connect to serial ROM clock pin (SK). Leave the pin open when the serial ROM interface not applied. Serial ROM interface: Data ROM_D 66 IO 3.3 Connect to the serial ROM data input/output pin. Pull up the pin with a 100-k resistor when the serial ROM interface not applied. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.12 TC6371AF Specification GPIO Interface (8 pins) NAME GPIO0 Rev. 1.8 02/01/22 Pin 110 IO IO VCC (V) General-purpose port 0. 3.3 Pull up this pin. General-purpose port 1. FUNCTION GPIO1 111 IO 3.3 Pull up this pin. General-purpose port 2. GPIO2 112 IO 3.3 Set to Low when 8-bit ROM selected or set to High when 16-bit ROM selected in ROM interface mode. Pull up this pin .when the serial ROM interface is not applied, General-purpose port 3. GPIO3 114 IO 3.3 Pull up this pin. General-purpose port 4. GPIO4 115 I 3.3 Set to Low. General-purpose port 5. GPIO5 116 I 3.3 Set to High. General-purpose port 6. GPIO6 117 I 3.3 Set to Low. General-purpose port 7. GPIO7 119 I 3.3 Set to Low. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.13 TC6371AF Specification Pin Signals (Continued) Test Pins (4 pins) NAME TSTI0 TSTI1 TSTI2 TSTI3 Rev. 1.8 02/01/22 Pin 61 62 63 64 IO VCC (V) Test mode signals 3, 2, 1, 0 FUNCTION I 3.3 Used in Test mode. Set TSTI[3-0] to "0000" in normal operating mode. Set TSTI[3-0] to "0010" when using the serial ROM interface. 3.3 Power Supply, GND, and NC Pins (26) NAME VSS VDD NC Pin 1, 12, 23, 33, 44, 54, 65, 76, 87, 97, 108, 118 6, 17, 28, 39, 49, 60, 70, 81, 92, 103, 113, 124 126, 127 GND 3.3V Not connected. FUNCTION 3.4 Interface Pin Summary Interface Number of pins 50 8 1 22 2 19 Sub total 103 12 12 2 Total 128 Leave open. System interface, Serial ROM interface, GPIO interface, TEST pins Remarks PCI SD card SD card power supply control SmartMediaTM SmartMediaTM power supply control System Power supply GND Not connected (NC) TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.14 TC6371AF Specification Rev. 1.8 02/01/22 4 Description of Functions 4.1 PCI Device Interface * * * * * Address decode timing Delayed transaction LOCK# PERR#, SERR# Resource space Medium Supported Not supported Not supported 4.1.1 Resource Space The TC6371AF has the following resource space: * SD host controller configuration register space * SD control register space * SmartMediaTM host controller configuration register space * SmartMediaTM control register space SD host controller /SmartMediaTM host controller configuration register space The configuration space of the host controllers is set by external pins IDSEL0, IDSEL1, and FCMODE. FCMODE pin 0 Single-function mode SD host controller configuration register space Determined by IDSEL0 Header-type 00h Determined by IDSEL0 SmartMediaTM host controller configuration register space Determined by IDSEL1 Header-type 00h Determined by IDSEL0 FUNCTION No. 1 Header-type 80h IDSEL1 pulled up 1 Multifunction mode FUNCTION No. 0 Header-type 80h IDSEL1 pulled up Note: When using only either the SD host controller function or the SmartMediaTM host controller function in systems using the TC6371AF, set Single-Function mode and mask the configuration space of the host controller you don't need. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.15 TC6371AF Specification Rev. 1.8 02/01/22 * SD Control Register Space Use the base address register (config offset: 10h) of the SD host controller's configuration register for accessing the resources in the SD control register space. This allows you to set the SD control register space to any memory space. However, the SD control register space cannot be set to I/O resource space. SD host controller Configuration Registers Offset 10 h Host Memory Space Offset Base Address + 00 h Base Address SD Control Register Base Address + FF h : FFh * SmartMediaTM Control Register Space Use the base address register (config offset: 10h) of the SmartMediaTM host controller's configuration register for accessing the resources in the SmartMediaTM control register space. This allows you to set SmartMediaTM control register space to any memory or I/O space. SmartMedia host controller Configuration Registers Offset 10 h Host Memory Space Offset Base Address + 00 h Base Address : FFh SmartMedia Control Register : : Base Address + 07 h TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.16 TC6371AF Specification Rev. 1.8 02/01/22 4.2 Register Map The TC6371AF incorporates an SD host controller registers and a SmartMediaTM host controller registers. * SD host controller configuration register * SD control register * SmartMediaTM host controller configuration register * SmartMediaTM control register 4.2.1 SD Host Controller Configuration Register 31 23 Device ID (0803h) Status (0210h) Class Code (088000h) Header Type SD Card Register Base Address 15 07 Vendor ID (1179h) Command (0000h) Revision ID (02h) Cache Line Size 00 Port 00h 04h 08h 0Ch 10h 14h-27h CISPT Subsystem Device ID (0001h) *1 Subsystem Vendor ID (1179h) *1 28h 2Ch 30h Capability Pointer 34h 38h Interrupt Pin SD Clock Mode PCI Clock Control Interrupt Line Gated Clock Control Pin Status *2 Power Control Card Detect Reset *2 Card Detect Mode 3Ch 40h 44h 48h 4Ch 50h-7Fh Power Management Capabilities (PMC) Data PMCSR PCI to PCI Bridge Support (PMCSR_BSE) Next Item Ptr Capability ID 80h 84h 88h 8Ch-9Fh *2 CIS A0h-EFh F0h-F7h TEST Single Function *2 PM Write Protect Write Protect F8h FCh Power Management Control/Status (PMCSR) *2 PME Trigger Enable *1:Regarding Subsystem Vendor ID and Subsystem Device ID, the default values of these register are The TOSHIBA's ID. In the case of using TC6371AF, please set these register to your ID. Please set your ID by BIOS as followings. (1) Set 01h to Write Protect Register(Config.FCh). (2) Set your ID to Subsystem Vendor ID and Subsystem Device ID Register. (3) Set 00h to Write Protect Register(Config.FCh). *2: PME context register TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.17 TC6371AF Specification 4.2.2 Offset 02h 06h 0Ah 0Eh 12h 16h 1Ah 1Eh 22h 26h 2Ah 2Eh 32h 36h 3Ah 3Eh 42h 46h 4Ah 4Eh 52h 56h 5Ah 5Eh 62h | 7Eh 82h 86h 8Ah 8Eh 92h 96h 9Ah 9Eh A2h A6h AAh AEh B2h B6h BAh BEh C2h | DEh E2h E6h EAh EEh F2h F6h FAh FEh Rev. 1.8 02/01/22 SD Control Register 15-08 bit 07-00 bit SD_PORT SD_ARG1 SD_LENGTH SD_RSP1 SD_RSP3 SD_RSP5 SD_RSP7 SD_INFO2 SD_INFO2_MASK SD_WIDTH ----SD_BUF1 ----------------------------------------------------------CORE_REV BUF_ADR ----------Revision Offset 00h 04h 08h 0Ch 10h 14h 18h 1Ch 20h 24h 28h 2Ch 30h 34h 38h 3Ch 40h 44h 48h 4Ch 50h 54h 58h 5Ch 60h | 7Ch 80h 84h 88h 8Ch 90h 94h 98h 9Ch A0h A4h A8h ACh B0h B4h B8h BCh C0h | DCh E0h E4h E8h ECh F0h F4h F8h FCh 15-08 bit SD_CMD SD_ARG0 SD_STOP SD_RSP0 SD_RSP2 SD_RSP4 SD_RSP6 SD_INFO SD_INFO_MASK SD_CLK SD_OPTION --SD_BUF0 ----------------------------------------------------------SOFT_RST --Resp_Header ----------07-00 bit TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.18 TC6371AF Specification 4.2.3 SmartMediaTM Host Controller Configuration Register 31 23 Device ID (0804h) Status (0490h) Class Code (088000h) Header Type SmartMediaTM Controller Register Base Address 15 07 Vendor ID (1179h) Command (0000h) 00 Rev. 1.8 02/01/22 Port 00h 04h 08h 0Ch 10h 14h-27h Revision ID (02h) CIS Pointer Subsystem Device ID(0001h) Subsystem Vendor ID(1179h) 28h 2Ch 30h Capability Pointer 34h 38h Interrupt Pin Interrupt Line 3Ch 40h-47h *2 Event Control *2 PME Enable *2 INT Enable *2 CLKRUN Control 48h 4Ch 50h-57h *2 Debug 58h 5Ch-5Fh *2 SmartMediaTM Detect Control *2 SmartMediaTM Power Supply Control *2 SmartMediaTM Transaction Control 60h 64h-7Fh *2 Power Management Capabilities (PMC) *2 Data *2 PMCSR PCI to PCI Bridge Support (PMCSR_BSE) *2 Next Item Ptr *2 Capability ID 80h 84h 88h-9Fh *2 Power Management Control/Status (PMCSR) *2 CIS *2 ROM Control *2 ROM Index Port *2 ROM Data Port A0h-EFh F0h F4h-FBh *2 Monitor Select *2 Configuration Control FCh *1:Regarding Subsystem Vendor ID and Subsystem Device ID, the default values of these register are The TOSHIBA's ID. In the case of using TC6371AF, please set these register to your ID. Please set your ID by BIOS as followings. (1) Set 01h to Configuration Control Register(Config.FCh). (2) Set your ID to Subsystem Vendor ID and Subsystem Device ID Register. (3) Set 00h to Configuration Control Register(Config.FCh). *2: PME context register TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.19 TC6371AF Specification 4.2.4 SmartMediaTM Control Register Config-60h bit4=1 Offset1 00h 01h 02h(Write) 02h(Read) 04h 06h 03h, 05h, 07h Rev. 1.8 02/01/22 Config-60h bit4=0 Offset2 03h-00h 04h(Read/Write) 05h 06h 07h - Register name R/W Data Register Reserved *Mode Register *Status Register *Interrupt Status Register *Interrupt Mask Register Reserved RW W(R/W) R R RW - * PME context register The offset of this register set varies according to the status of the bit that controls the SmartMediaTM control register's High-Speed mode (config 60h bit 4). (Setting bit 4 = 0 enables 32/16-bit access to the data register.) TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.20 TC6371AF Specification Rev. 1.8 02/01/22 4.3 4.3.1 Clock / Reset Clocks The TC6371AF has two pins for input clocks: PCICLK and CLK32. (1) (2) PCICLK: PCI clock input (33 MHz max) PCI interface and internal operation reference clock. CLK32: 32-kHz clock input Used as detecting insertion and removal of SD card and SmartMedia and an interrupt detection clock and for event detection in D3 state. The interrupt signal, implied insertion or detachment, shall be generated synchronous to this clock signal. Note that if CLK32 is stopped, the interrupt detector does not operate while TC6371AF is suspended or in D1-3 state set according to the PCI bus power management interface specifications. 4.3.2 Reset The TC6371AF uses the following two reset signals. (1) #PCIRST: PCI reset signal. Asserted at power on and at a transition to D3cold. When the input destination of this signal is set to D3 state, the contents of the context register are saved and not cleared even when #PCIRST is asserted. #PWRST: Power-on reset signal. Asserted at power on. Asserting #PWRST clears all the TC6371AF's internal registers. (2) TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.21 TC6371AF Specification Rev. 1.8 02/01/22 4.4 4.4.1 Detection of Insertion/Removal of SD Card/ SmartMediaTM Detection of Insertion/Removal of SD Card The TC6371AF detects insertion and removal of the SD card using #SDCD and SDCD3. When #SDCD is Low or SDCD3 is High, the SD card is inserted. When #SDCD is High or SDCD3 is Low, the SD card is withdrawn. The following is an example of how to detect insertion of the SD card. 1. The TC6371AF detects that #SDCD is Low, then turns power on to the SD card socket. 2. The TC6371AF detects that the SDCD3 pin is High. The following is an example of how to detect removal of the SD card. 1. The TC6371AF detects that #SDCD is High, or SDCD3 is Low. 2. The TC6371AF turns power off. * Removing the SD card while the card is being accessed may damage the card. The SD card insertion/removal status can be checked by bit 9, 8, 4, and 3 of 1Ch SD port register. 4.4.2 Detection of Insertion/Removal of SmartMedia TM The TC6371AF can detect insertion and removal of the SmartMediaTM using #SMCD and #SMEJSW. When #SMCD or #SMEJSW is Low, the SmartMediaTM is inserted. When #SMCD or #SMEJSW is High, the SmartMediaTM is withdrawn. When the bit 7 of the SmartMediaTM host controller configuration register 63h set to "1" and when #SMEJSW is High, this indicates that the SmartMediaTM is inserted. When the bit 6 of SmartMediaTM host controller configuration register 63h set to "1", detection of SmartMediaTM has been masked using #SMEJSW. The following is an example of how to detect insertion of the SmartMediaTM. 1. The TC6371AF detects that #SMCD is Low, then #SMEJSW is Low. 2. The TC6371AF then turns power on to the SmartMediaTM socket. The following is an example of how to detect removal of the SmartMediaTM. 1. The TC6371AF detects that #SMEJSW is High, then #SMCD is High. 2. The TC6371AF then turns power off. * Removing the SmartMedia TM card when the SmartMedia TM is being accessed may damage the SmartMedia . TM The SmartMediaTM insertion status can be checked using status bits 3 and 2 and interrupt status bit 3 of the SmartMediaTM control register. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.22 TC6371AF Specification Rev. 1.8 02/01/22 4.5 Interrupts When the TC6371AF detects the following interrupt sources, the TC6371AF asserts interrupt signals (#INTA, #INTB, #PME). The power management register has to be set in order to get #PME output. 4.5.1 Interrupt Sources by SD Card Interrupt sources by the SD card are as listed below: Normal interrupts * SD card insertion interrupt by #SDCD * * SD card removal interrupt by #SDCD * * SD card insertion interrupt by SDCD3 * * SD card removal interrupt by SDCD3 * * Interrupt by write enable buffer signal * Interrupt by read enable buffer signal * Interrupt by R/W end signal * Interrupt by response end signal Error interrupts * Timeout error (command) interrupt * Buffer underflow interrupt * Buffer overflow interrupt * Timeout error (data) interrupt * End bit error interrupt * CRC error interrupt * CMD index error interrupt 4.5.2 Interrupt Sources by SmartMedia TM Interrupt sources by the SmartMediaTM are as listed below: * * * * SmartMediaTM insertion interrupt SmartMediaTM removal interrupt Interrupt by #SMEJSW signal Interrupt when #SMRB signal changes from Low to High * Interrupt sources which can be output to #PME. Other interrupt sources can only be output to #INTA or #INTB. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.23 TC6371AF Specification Rev. 1.8 02/01/22 4.6 Card Slot Power Supply Control The TC6371AF is designed so that it can be connected to MIC2563 (power supply control LSI). An example of application circuit is shown below. System Power Supply 3.3V Vcc VCC (3.3v) SMVC3EN TC6371AF SDPWR VCC3EN VCC5EN EN0 EN1 VC3EN VC5EN EN0 EN1 MIC2563 GND SmartMedia Slot VCC (3.3v) SD Card/MMC Slot 4.6.1 SD Card Slot Power Supply Control Setting the power control register (config offset: 48h) enables to control the power supply of SD card. Parallel power supply control signal Signal name SDPWR Function Controls 3.3-V VCC for SD card Pin 69 4.6.2 SmartMediaTM Slot Power Supply Control There are two modes for controlling power supply to the SmartMediaTM slot: Manual Power Supply Control mode and Automatic Power Supply Control mode. Those modes are switched using the bit 7 of the SmartMediaTM host controller configuration register at 62h. In Manual Power Supply Control mode, bits 3 and 2 of the SmartMediaTM control register (offset: 02h) are used. In Automatic Power Supply Control mode, when the SmartMediaTM is inserted, power is automatically turned on. When the SmartMediaTM is removed, power is turned off. As of January. 2002, the SmartMediaTM driver uses a manual power supply control. Parallel power supply control signal Signal name SMVC3EN Function Controls 3.3-V VCC for SmartMediaTM Pin 72 TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.24 TC6371AF Specification Rev. 1.8 02/01/22 4.7 Suspend State When #SUSPEND is Low, TC6371AF prevents throughput of data input from the SD card and SmartMediaTM. Control signals, output from TC6371AF, are set at non-active level. Among PC system is Suspend state, it is recommended that VDD of TC6371AF is power off. Phase I Phase II Phase III Phase IV VCC X X X X X PWRST# PCIRST# SUSPEND# PCICLK Suspended * Phase I: Immediately after power on, #PCIRST and #PWRST are L and #SUSPEND is H. This state clears all circuits. * Phase II: Normal state with #PCIRST de-asserted (H). * Phase III: Asserting #SUSPEND sets suspend state. In this state, TC6371AF prevents throughput of signals input from the SD card and SmartMediaTM.(*) In this state, TC6371AF cannot accept PCI transactions. Stopping the PCICLK in suspend state reduces power consumption. * Phase IV: De-asserting #SUSPEND restores TC6371AF to its normal operating state. * When #SUSPEND is Low, TC6371AF prevents current flow from VCC to GND even if an intermediate potential is applied and TC6371AF masks out the input buffer signals as well. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.25 TC6371AF Specification Rev. 1.8 02/01/22 4.8 Power Management The TC6371AF supports a power management function conforming to PCI bus power management interface specification revision 1.1 (PCI-PM) for both the SD host controller and the SmartMediaTM host controller. As of January. 2002, the SD/MMC/ SmartMediaTM driver does not support a function which enables #PME and then performs output. 4.8.1 PME Register Structure To support the #PME, the TC6371AF registers conform to PCI-PM specifications. Config. PME Registers Offset Power Management Capabilities Next Item Ptr (PMC) Data PMCSR PCI to PCI Bridge Support (PMCSR_BSE) Power Management Control/Status 84h (PMCSR) Capability ID 80h 4.8.2 PME State The PCI power management specifications are defined by five states (D0uninitialized D0active, D1, D2, D3hot, and D3cold) according to the power dissipation level. The TC6371AF can support all five states. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.26 TC6371AF Specification 4.8.3 PME Context Register Rev. 1.8 02/01/22 In D3hot and D3cold states, TC6371AF supports PME. This allows the TC6371AF to detect wakeup events and assert #PME even when #PCIRST is asserted and auxiliary power only (D3cold) is supplied. The required registers must therefore be saved. The following are the registers to be saved. 1) SD Host Controller Configuration register * Offset 80-87h * Offset 48h * Offset 4Ch * Offset 88h * Offset A0-Efh * Offset FDh SD IO register * Offset 20h bit 9, 8, 4, 3 2) Smart MediaTM Host Controller Configuration register * Offset 80-87h * Offset 48h * Offset 49h * Offset 4Ah * Offset 4Ch * Offset 5Bh * Offset 60h * Offset 62h * Offset 63h * Offset A0-EFh * Offset F0-F1h * Offset F2h * Offset F3h * Offset FCh * Offset FFh SmartMediaTM Control register * Offset 00-03h(00h) * Offset 04h(02h Write) * Offset 05h(02h Read) * Offset 06h(04h) * Offset 07h(06h) Power management-related register Power Control CardDetect Mode PME Trigger Enable CIS PM Write Protect SD INFO MASK register Power management-related register Interrupt Enable PME Enable Event Control CLKRUN Control Debug SmartMediaTM Transaction Control SmartMediaTM Power Supply Control SmartMediaTM Detect Control CIS ROM Data Port ROM Index Port ROM Control Configuration Control Moniter Select Protect Data register Mode register Status register Interrupt Status register Interrupt Mask register TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.27 TC6371AF Specification 4.8.4 #PME Generation Rev. 1.8 02/01/22 #PME is controlled (enabled/disabled) by the bit 8 (PME_EN) of the power management control/status register (config offset: 84h). The status can be checked using the bit 15 of the register. When the TC6371AF detects card insertion/removal events or other interrupt events, the TC6371AF asserts #PME. The host controller controls registers to perform masking events and controlling flags. Card type SD host controller SmartMediaTM host controller Interrupt event Card insertion/removal Card insertion/removal BSY release Pin name #SDCD SDCD3(CD) #SMCD #SMEJSW #SMRB Details Indicates insertion into/removal from card slot Indicates insertion into/removal from card slot Triggered by SmartMediaTM BSY release Note: The TC6371AF uses a 32-kHz clock (CLK32) for the #PME control circuit. In D3hot/D3cold state or in D1/D2 state where the CLKRUN protocol operates, PCICLK is stopped. Therefore, when CLK32 is not input, the TC6371AF's #PME control circuit does not operate and #PME cannot be supported. 4.8.5 #PME Pin The #PME pin outputs power management interrupts according to PCI bus power management interface specifications. Because the pin is an open drain output determined by PCI bus power management interface specifications, it must be pulled up outside the TC6371AF. To prevent leak current from the external pull-up even when the power supply to this pin is off, the pin is open-drain output with failsafe measures. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.28 TC6371AF Specification 4.8.6 #PWRST Rev. 1.8 02/01/22 The TC6371AF supports a #PME wakeup from D3cold state (in conformance to the PCI 2.1 power-on reset sequence). The #PWRST signal is used to reset the PME context at power on. Phase I VCC OFF ON Phase II Phase III Phase IV Vaux Phase V ON Phase II PCICLK #PCIRST #PWRST Internal state Internal clear (general) Internal clear (PME context) OFF X X X X X D0uninit ACTIVE OFF ACTIVE D0 - D2 D3hot D3cold D0uninit D0active- T1 T2 T1 = (Period until #PCIRST raised T2 = (Period until #PCIRST raised - #PWRST raising) >= 0 VCC is turned on again) > 1ms * Phase I: #PWRST and #PCIRST are L when the VCC is turned on from power off. This state clears all circuits, including the PME context. * Phase II: Normal operating mode. #PWRST and #PCIRST are both H. * Phase III: Setting PMCSR (config 84h) bits 1 and 0 to 11b sets the internal circuitry to D3hot. The PCICLK is set to L except at a configuration access of PMCSR. Setting bits 1 and 0 of PMCSR to 00b shifts to D0uninit state. Asserting #PCIRST at L shifts to Phase IV D3cold. * Phase IV: Asserting #PCIRST at L sets the internal circuitry to D3cold. During this period, the power supply to VCC can be switched to Vaux. At that time, VCCP can be turned off, but because #PCIRST is L and #PWRST is H, the PME context is saved. * Phase V: VCCP is turned back on and PCICLK goes active. While #PCIRST is L, an internal (general) clear resets all circuits except the PME context. Next, the TC6371AF returns to normal operating mode and the context can be written. #PWRST L H H #PCIRST X L H PME context Cleared Saved Normal Notes: If D3cold is not supported, set the #PCIRST input signal level the same as that of the #PWRST input signal. If D3cold is supported, it is desirable to switch Vaux after asserting #PCIRST. When restoring from D3cold state, make sure that the PCICLK waveform is stable. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.29 TC6371AF Specification 4.8.7 Vaux in D3cold State Rev. 1.8 02/01/22 Because the TC6371AF supports a D3cold state, it requires an auxiliary power supply (Vaux). The four systems that need the auxiliary power supply are: * TC6371AF internal PME context (includes interrupt detection): VCC * Card slot power supply (power-SW) related control: VCC * Interface with host (system interface): VCC * SmartMediaTM slot/SD card slot interface: VCC Toshiba recommends asserting #PCIRST to be "Low" before moving to Vaux operation. CNT Vaux VCC VCC Vaux VCC CNT Power Switch Vaux Schematic VCC TC6371AF CORE Host I/F SmartMedia I/F SmartMedia SD Card I/F SD Card MMC Pins that are active when operating on auxiliary power supply. Host I/F #PME CLK32 #PWRST #SUSPEND SDPWR SMVC3EN SD I/F (VCC) #SDCD SmartMediaTM (VCC) #SMCD #SMEJSW TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.30 TC6371AF Specification Rev. 1.8 02/01/22 4.9 Serial ROM Interface The TC6371AF supports a serial ROM interface. The ROM interface is used to load the configuration register initial values (mainly subsystem ID and subsystem vendor ID initial values) and CIS information when using the CardBus card. When using the serial ROM interface, connect the interface as below and set the external pins TST1[3-0] to D010. Toshiba verified operation of the serial ROM interface using one "NM93C66"(Fairchild) with a 10-k resistor connected shown as the figure below. ROM_CS ROM_SK ROM_D Chip select Clock Output data Input data TC6371AF EEPROM TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.31 TC6371AF Specification Rev. 1.8 02/01/22 4.10 Pulled-Up/Pulled-Down Resistors The TC6371AF needs pulled-up/pulled-down resistors attached to each interface. The following resistance values are provided as a guide. 4.10.1 SD Card Interface NAME SDCD3 SDCD2 SDCD1 SDCD0 Pin 85 83 102 101 IO Pull-up/ Pull-down Pull-up Pull-up power supply SDVCC SDVCC SDVCC SDVCC Resistance 47K 100K 100K 100K FUNCTION IO Pull-up Pull-up Pull-up SD card data bus *1 33K SDCMD 89 IO Pull-up SDVCC *2 100K Pull-up Pull-up VCC VCC 10K 10K SD card / command *1: MultiMedia Card supported *2: MultiMedia Card not supported SD card clock SD card detection SD card write-protection SDCLK #SDCD SDWP 98 104 105 O I I 4.10.2 SmartMediaTM Interface NAME SMD7 SMD6 SMD5 SMD4 SMD3 SMD2 SMD1 SMD0 SMCLE SMALE #SMCE #SMWE #SMRE #SMWP #SMRB #SMCD SMLVD #SMWPD #SMEJSW #SMLED #SMLOCK #SMEJCT Pin 91 94 96 99 95 93 90 86 75 78 77 80 79 84 82 100 88 73 74 107 109 106 IO Pull-up/ Pull-down Pull-up power supply Resistance FUNCTION IO Pull-down 100K Data O (3state) O (3state) O (3state) O (3state) O (3state) O (3state) I I I I I O (OD) O (OD) O (OD) Pull-down Pull-down Pull-up Pull-up Pull-up Pull-down Pull-up Pull-up Pull-down Pull-up Pull-up Pull-up Pull-up Pull-up SMVCC SMVCC SMVCC SMVCC VCC VCC VCC VCC VCC VCC 100K 100K 100K 100K 100K 100K 10K 10K 100K 10K 10K 100K 100K 100K Enables the command latch. Enables the address latch. Enables the chip. Enables a write. Enables a read. Write-protection Busy Detects card. Detects low voltage. Write-protection seal Eject request Turns on the LED. Lock mode Eject response TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.32 TC6371AF Specification Rev. 1.8 02/01/22 4.11 Connection example of SD Card/SmartMediaTM socket It is shown that total 32 signal connections example of TC6371AF which have 8 signals of SD card TM interface, 1 signal of a power supply control for SD card, 22 signals of SmartMedia interface and 1 signal TM of a power supply control for SmartMedia . As for our company, a movement confirmation of the SD card TM /SmartMedia was done by using FRS-001-2000-0 and FPS009-3000 of theYAMAICHI Company. An outside pull-up/down resistance that is mentioned on an item of the "4.10 Pull-up/down resistance" is not shown in a bottom figure. When you design a circuit, please refer to recommended resistance by an item of the "4.10 Pull-up/down " and a bottom figure. FPS009-3000 manufactured by the TC6371AF SDCD3 SDCMD SDCLK SDCD0 SDCD1 SDCD2 SDWP #SDCD SDPWR YAMAICHI Company MIC2563 manufactured by the MICREL Company FRS-001-2000-0 manufactured by the YAMAICHI Company SM-D7 SM-D6 SM-D5 SM-D4 SM-D3 SM-D2 SM-D1 SM-D0 SM-CLE SM-ALE SM-WE SM-RE SM-CE SM-WP SM-R/B SM-CD SM-LVD SM-WP-1 SM-WP-2 SM-SW-1 SM-SW-2 SM-Vcc SM-Vcc SM-Vss SM-Vss SM-Vss GND SMVC3EN SMD7 SMD6 SMD5 SMD4 SMD3 SMD2 SMD1 SMD0 SMCLE SMALE #SMWE #SMRE #SMCE #SMWP #SMRB #SMCD SMLVD #SMWPD #SMEJSW #SMLED #SMLOCK #SMEJCT TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.33 TC6371AF Specification Rev. 1.8 02/01/22 4.12 Processing Unused InterfaceExternal Pins TC6371AF accommodates one port of SD Card Interface and one port of SmartMediaTM Interface. See descriptions for processing pins in respective sections of interface when dealing with unused External Pins for interfaces. 4.12.1 Processing Pins (SmartMediaTM Interface unsupported) Process Pins according to the following table when SmartMediaTM Interface is unused (when each signals are not connected to other parts) : NAME SMD7 SMD6 SMD5 SMD4 SMD3 SMD2 SMD1 SMD0 SMCLE SMALE #SMCE #SMWE #SMRE #SMWP #SMRB SMLVD #SMCD #SMWPD #SMEJSW #SMLED #SMLOCK #SMEJCT SMVC3EN Pin 91 94 96 99 95 93 90 86 75 78 77 80 79 84 82 88 100 73 74 107 109 106 72 I/O IO IO IO IO IO IO IO IO O (3state) O (3state) O (3state) O (3state) O (3state) O (3state) I I I I I O (OD) O (OD) O (OD) O Process Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K OPEN OPEN OPEN OPEN OPEN OPEN High Low High High High OPEN OPEN OPEN OPEN And, NAME FCMODE IDSEL0 IDSEL1 Pin 58 13 120 I/O I I I Process Low Connect to any AD line Low TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.34 TC6371AF Specification 4.12.2 Processing Pins (SD Interface unsupported) Rev. 1.8 02/01/22 Process Pins according to the following table when SD Interface is unused (when each signals are not connected to other parts): NAME SDCD3 SDCD2 SDCD1 SDCD0 SDCMD SDCLK #SDCD SDWP SDPWR Pin 85 83 102 101 89 98 104 105 69 I/O IO IO IO IO IO O I I O Process Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Pull-up resistance for 100K Low High Low OPEN And, NAME FCMODE IDSEL0 IDSEL1 Pin 58 13 120 I/O I I I Process Low Low Connect to any AD line TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.35 TC6371AF Specification Rev. 1.8 02/01/22 4.13 #SMLED signal TC6371AF has the #SMLED signal for SmartMedia interface. It is recommended that this signal is used for access LED, for example reading and writing. This signal is controlled by setting Mode Register(Offset:04h) of SmartMedia control register. TC6371AF Vcc Vcc #SMLED When Mode Register is written 04h, #SMLED becomes low and LED turns on. In reverse, in the case of being written 00h, #SMLED becomes high and LED turns off. 4.14 GPIO interface specification TC6380AF holds 8 pins(GPIO[7:0] signals) as general port. As GPIO[7:4] signals are input ones, please use them as fixed values with referring to page 14. It shows a usage method of GPIO[3:0] signals. GPIO[3:0] signals can be output by setting 1b to D5 of Monitor Select Register(Config Offset:FFh) of SmartMedia host controller register. GPIO3 signal can be controlled by D3 of Monitor Select Register, GPIO2 signal can be controlled by D2 of Monitor Select Register, GPIO1 signal can be controlled by D3 of Monitor Select Register and GPIO0 signal can be controlled by D0 of Monitor Select Register. As of January. 2002, the SD/MMC/SmartMedia driver does not perform any functions by controlling GPIO signals. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.36 TC6371AF Specification Rev. 1.8 02/01/22 5 Electrical Characteristics 5.1 Absolute Maximum Ratings Absolute Maximum Ratings Symbol Vcc Vin3 Vout Tstg Parameter Supply Voltage Range Input Voltage (3.3V) Output Voltage Storage Temperature Range Min -0.3 -0.3 -0.3 -40 Max 5.0 Vcc+0.3 Vcc+0.3 125 Unit V V V C Condition GND=0V GND=0V GND=0V Note 1 Note 1: VCC power supply (Caution) The absolute maximum ratings indicate a level at which permanent damage to the device may occur if those ratings are exceeded and are not intended to provide a guarantee that damage will not occur by staying within the level of the ratings. 5.2 5.2.1 DC Characteristics Power Supply Voltage: Recommended Conditions Parameter Supply Voltage for Core Logic Ambient Temperature under bias Power Pin Vcc Topr Min 3.0 0 Typ 3.3 25 Max 3.6 70 Unit V C Note TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.37 TC6371AF Specification 5.2.2 PCI Interface DC Characteristics Rev. 1.8 02/01/22 PCI interface DC characteristics at 3.3 V operation. Symbol Vih Vil Vih Vil Voh Vol Ioh Parameter Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Switching Current High 1 Switching Current High 2 Min 0.5Vcc -0.5 0.7Vcc -0.5 0.9Vcc -12Vcc 16Vcc -10 Max Vcc+0.5 0.3Vcc Vcc+0.5 0.2Vcc 0.1Vcc -32Vcc 38Vcc 10 Unit V V V V V V mA mA mA mA A Test Condition Note 1-1 1-1 1-2 1-2 Iout=-500A Iout=1500 Vout=0.3Vcc Vout=0.7Vcc Vout=0.6Vcc Vout=0.18Vcc 0 Iol Switching Current Low 1 Switching Current Low 2 Iilk Input Leakage Current Slewr Slewf Output Rise Slew Rate Output Fall Slew Rate 1 1 4 4 V/ns V/ns 1-3 1-3 Note 1-1: Applied for AD[31:0], CBE#[3:0], #FRAME, #IRDY, #CLKRUN, IDSEL0, IDSEL1 pins Note1-2: Applied for #PCIRST PCICLK pins Note1-3: Applied for AD[31:0], CBE#[3:0], PAR, #TRDY, #STOP, #DEVSEL, #CLKRUN pins Note1-4: Applied for AD[31:0], CBE#[3:0], PAR, #TRDY, #STOP, #DEVSEL, #CLKRUN, #INTA, #INTB, #PME pins TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.38 TC6371AF Specification 5.2.3 SmartMediaTM Interface DC Characteristics Rev. 1.8 02/01/22 SmartMediaTM interface DC characteristics at 3.3 V operation (VCC =3.0-3.6V, Ta=0-70C) Symbol Vih Vil Voh Parameter Input High Voltage Input Low Voltage Output High Voltage Min 2.2 2.4 Max 0.6 Unit V V V Condition Note 2-1 2-1 Iout=-1mA 3.0V Vol1 Output Low Voltage 0.4 V Iout=1mA 3.0V Vol2 Output Low Voltage 0.4 V Iout=8mA 3.0V Iilk Input Leakage Current -10 10 A Vin=0-Vcc 2-1 Note2-1: Applied for SMD[7:0], #SMRB, #SMCD, SMLVD, #SMWPD, #SMEJSW pins Note2-2: Applied for SMD[7:0], SMCLE, SMALE, #SMCE, #SMWE, #SMRE, #SMWP pins Note2-3: Applied for #SMLOCK, #SMEJCT, #SMLED pins 5.2.4 SmartMediaTM Power Supply Control DC Characteristics SmartMediaTM power supply control DC characteristics at 3.3 V operation (Vcc =3.0-3.6V, Ta=0-70 Symbol Voh ) Parameter Output High Voltage Min 2.4 Max Unit V Condition Iout=-100A 3.0V 2-4 Vol Output Low Voltage 0.6 V Iout=100A 3.0V Note2-4: Applied for SMVC3EN pin TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.39 TC6371AF Specification 5.2.5 SD Card Interface Pin DC Characteristics Rev. 1.8 02/01/22 SD card interface DC characteristics at 3.3 V operation (VCC =3.0-3.6V, Ta=0-70C) Symbol Vih Vil Vih Vil Voh Parameter Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Min 0.7Vcc Vss-0.3 0.8Vcc 0.75Vcc Max Vcc+0.3 0.175Vcc 0.2Vcc Unit V V V V V Condition Note 3-1 3-1 3-2 3-2 Iout=-1mA 3.0V Vol Output Low Voltage 0.125Vcc V Iout=1mA 3.0V Iilk Input Leakage Current -10 10 A 0 Rdat3 Pull-up (pin1) resistance inside card 10 90 K Note3-1: Applied for SDCD[3:0], SDCMD, SDWP pins Note3-2: Applied for #SDCD pins Note3-3: Applied for SDCD[3:0], SDCMD, SDCLK pins 5.2.6 SD Card Power Supply Control DC Characteristics ) SD card power supply control DC characteristics at 3.3 V operation (Vcc =3.0-3.6V, Ta=0-70 Symbol Voh Parameter Output High Voltage Min 2.4 Max Unit V Condition Iout=-100A 3.0V 3-3 Vol Output Low Voltage 0.6 V Iout=100A 3.0V Note3-3: Applied for SDPWR pin TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.40 TC6371AF Specification 5.2.7 System Interface Pin (5 V-Tolerant) DC Characteristics Rev. 1.8 02/01/22 System interface pin DC characteristics (VCC =3.0-3.6V, Ta=0-70C) Symbol Vih Vil Iilk Vih Vil Iilk Vih Vil Iilk Vih Vil Iilk Parameter Input High Voltage Input Low Voltage Input Leakage Current Input High Voltage Input Low Voltage Input Leakage Current Input High Voltage Input Low Voltage Input Leakage Current Input High Voltage Input Low Voltage Input Leakage Current Min Vcc-0.6 -10 0.8Vcc -10 0.8Vcc -10 0.8Vcc -10 Max 0.6 10 0.6 10 0.2Vcc 10 0.2Vcc 10 Unit V V A V V A V V A V V A Test Condition Note 4-1 4-1 0 0 Vin= 4-3 4-4 4-4 0 Note4-1: Applied for CLK32 pin Note4-2: Applied for #PWRST pin Note4-3: Applied for #SUSPEND pin Note4-4: Applied for FCMODE pin TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.41 TC6371AF Specification 5.2.8 GPIO Interface Pin DC Characteristics ) Unit V V mA mA A Rev. 1.8 02/01/22 GPIO interface pin DC characteristics (Vcc =3.0-3.6V, Ta=0-70 Symbol Vih Vil Ioh Iol Iilk Parameter Input High Voltage Input Low Voltage Output High Current Output Low Current Input Leakage Current Min 0.8Vcc 4 -10 Max 0.2Vcc -4 10 Condition Note 5-1 5-1 Voh=2.4V Vol=0.4V 0 Note5-1: Applied for GPIO[7:0] pins Note5-2: Applied for GPIO[3:0] pins 5.2.9 TEST Pin DC Characteristics ) Unit V V A 0 Symbol Vih Vil Iilk Parameter Input High Voltage Input Low Voltage Input Leakage Current Min 0.8Vcc -10 Max 0.2Vcc 10 Condition Note 6-1 6-1 6-1 Note6-1: Applied for TSTI[3:0] pins TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.42 TC6371AF Specification 5.2.10 Current Dissipation Characteristics Power Supply Current Symbol Parameter Power Supply Current, Standby 56 mA Rev. 1.8 02/01/22 Min Typ Max 100 Unit A Condition PCICLK=0, CLK32=32KHz VCC=3.6V #SUSPEND=low PCICLK=33MHz, CLK32=32KHz VCC=3.6V PCICLK=33MHz, CLK32=32KHz VCC=3.6V Iccstd IccSM Power Supply Current, Operating SmartMediaTM Power Supply Current, Operating SD Card or MultiMedia Card IccSD/ MMC 75 mA TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.43 TC6371AF Specification Rev. 1.8 02/01/22 5.3 5.3.1 AC Characteristics PCI Interface Signal AC Characteristics PCI clock AC characteristics (VCC=3.0-3.6V, Ta=0-70C) Symbol PCICLK Tcyc Thigh Tlow t1d t1e CLK cycle time CLK High time CLK Low time Slew Rate, PCICLK Rising Edge Slew Rate, PCICLK Falling Edge 30 11 11 1 1 4 4 ns ns ns V/ns V/ns Parameter Min Max Unit Notes PCICLK Timing Tcyc Tlow PCICLK Thigh 0.7VCC t1d 0.2VCC 0.4VCC p-to-p Min t1e TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.44 TC6371AF Specification PCI Reset AC Characteristics (VCC=3.0-3.6V, Ta=0-70C) Symbol #PCIRST Trst Trst-clk Reset active time after power stable Reset active time after CLK stable 1 100 ms s Rev. 1.8 02/01/22 Parameter Min Max Unit Notes PCI Reset Timing POWER 0.4Vcc #PCIRST Trst 0.4Vcc Trst-clk 0.4Vcc PCICLK PCI Reset Timing TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.45 TC6371AF Specification PCI Interface Output AC Characteristics (VCC=3.0-3.6V, Ta=0-70C) Symbol Parameter Min Max Unit Rev. 1.8 02/01/22 Notes AD[31:0], #CBE[3:0], PAR, #DEVSEL, #TRDY, #STOP, #CLKRUN Tval Ton Toff CLK to signal valid delay-bused signals Float to active delay Active to float delay 2 2 11 28 ns ns ns CL=10pF PCI Output Signals Timing 0.4Vcc PCICLK Tval OUTPUT (Shared) 0.285VCC:Rise Edge, 0.615VCC:Fall Edge Ton OUTPUT Toff PCI Output Signal Timing TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.46 TC6371AF Specification PCI Interface Input Signal AC Characteristics (VCC=3.0-3.6V, Ta=0-70C) Symbol Parameter Min Max Unit Rev. 1.8 02/01/22 Notes AD[31:0], #CBE[3:0], #FRAME, #IRDY, #CLKRUN, IDSEL0, IDSEL1 Tsu Th Input setup time to CLK-bused signals Input hold time from CLK 7 0 ns ns PCI Input Signals Timing 0.4Vcc PCICLK Tsu INPUT 0.4Vcc PCI Input Signals Timing Th TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.47 TC6371AF Specification 5.3.2 SmartMediaTM Interface Signal AC Characteristics Rev. 1.8 02/01/22 (VCC=3.0-3.6V, Ta=0-70C) Symbol tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWH tWW tRR tRP tRC tCEH tREH tIR tWHC tWHR tAR1 tCR SMCLE Setup Time SMCLE Hold Time #SMCE Setup Time #SMCE Hold Time #SMWE Pulse Width SMALE Setup Time SMALE Hold Time Data Setup Time Data Hold Time #SMWE High Hold Time #SMWP High to #SMWE Low Ready to #SMRE Low Read Pulse Width Read Cycle Time #SMCE High Hold Time(at the Last Serial Read) #SMRE High Hold Time Output Hi-Z to #SMRE Low #SMWE High to #SMCE Low #SMWE High to #SMRE Low SMALE Low to #SMRE Low(Address Register Read, ID Read) #SMCE Low to #SMRE Low(Data Register Read ,ID Read) Parameter Min 20 40 20 40 2PCICLK 20 40 30 20 3PCICLK 100 20 3PCICLK 80 250 2PCICLK 0 50 60 200 200 Max 6PCICLK 6PCICLK Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns AC Test Conditions Parameter Input Pulse Level Input comparison Level Output Data comparison Level Output Load 3.3V Model 0.4V2.4V 1.5V / 1.5V 1.5V / 1.5V 1TTL Gate and Cl=100pF TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.48 TC6371AF Specification Rev. 1.8 02/01/22 Command Cycle Timing SMCLE #SMCE #SMWE t CLS t CS t WP t ALS t CLH t CH t ALH t DS t DH SMALE SMD0-7 Command Cycle Signals Timing Serial Read Cycle Timing t RC #SMCE #SMRE SMD0-7 #SMRB Serial Read Cycle Signals Timing t RP t REH t RR TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.49 TC6371AF Specification Rev. 1.8 02/01/22 Address Cycle Timing t CLS SMCLE t CS #SMCE t WC t WP t WH t WP t WC t WH t WP t ALH #SMWE t ALS SMALE t DS SMD0-7 t DH t DS t DH t DS t DH Address Cycle Signals Timing Status Read Cycle Timing SMCLE #SMCE #SMWE #SMRE t CLS t CS t WP tCLH tCLS t CH t WHC t WHR t DS t DH SMD0-7 #SMRB Status Read Cycle Signals Timing TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.50 TC6371AF Specification Rev. 1.8 02/01/22 Data Write Cycle Timing t CLH SMCLE t WC #SMCE t CH t WH t WP t WH t WP #SMWE t ALS SMALE t DS SMD0-7 Data Write Cycle Signals Timing t DH t DS t DH t DS t DH Reset Cycle Timing SMCLE #SMCE t CLS t CS t WP t ALS t CLH t CH SMD0-7 SMALE SMD0-7 #SMRB t ALH t DS t DH t WW #SMWP Reset Cycle Signals Timing t WW TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.51 TC6371AF Specification Rev. 1.8 02/01/22 Read Cycle Timing SMCLE t CEH #SMCE #SMWE t ALH SMALE #SMRE t RC t WB t DS SMD0-7 t DH #SMRB Read Cycle Timing t RB Read Cycle Timing in case #SMCE is set to High SMCLE #SMCE #SMWE t ALH SMALE #SMRE t RC t WB t DS SMD0-7 #SMRB t DH Read Cycle Timing in case #SMCE is set to High TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.52 TC6371AF Specification Rev. 1.8 02/01/22 ID Read Timing SMCLE #SMCE #SMWE t CLS t CS t ALH t CH t ALS tAR1 t CR SMALE #SMRE t DS t DH SMD0-7 90h 00 ID Read Command Address Input Maker Code Device Code Output Output ID Read Timing Sequential Read Timing SMCLE #SMCE #SMWE SMALE #SMRE SMD0-7 00h CA0-7 PA0-7 Column Address N PA8-15 PA16-23 N N+1 N+3 527 0 1 2 527 Page Address M #SMRB Page M access Page M+1 512+16Byte/Page access Dout527 Sequential Read Timing TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.53 TC6371AF Specification Rev. 1.8 02/01/22 Auto Page Program Timing SMCLE #SMCE #SMWE SMALE #SMRE SMD0-7 00h CA0-7 PA0-7 PA8-15 PA16-23 Din Din Din 10h 70h Status Output t ww #SMRB Serial Data Input Command 512+16Byte/Page Dout527 Auto Program Command Status Read Command #SMWP Auto Page Program Timing Auto Block Erase Timing SMCLE #SMCE #SMWE SMALE #SMRE SMD0-7 60h PA0-7 PA8-15 PA16-23 D0h 70h #SMRB Busy Auto Block Erase Setup Command Erase Command Status Read Command Status Output #SMWP Auto Block Erase Timing TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.54 TC6371AF Specification 5.3.3 SD Card Interface Signal AC Characteristics Rev. 1.8 02/01/22 (VCC=3.0-3.6V, Ta=0-70C) Symbol Parameter SDCD[3:0], SDCMD, SDCLK Min Max Unit Notes Fpp Fod Twl Twh Ttlh Tthl Tisu Tih Todly Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock Low time Clock High time Clock fall time Clock rise time Input set-up time Input hold time Output delay time 0 0 30 30 10 10 16 256 10 10 25 MHz KHz ns ns ns ns ns ns ns Cl=25pF Cl=25pF Cl=25pF Cl=25pF Cl=25pF Cl=25pF Cl=25pF Cl=25pF Cl=25pF SD Card Interface Signals Timing 0.75Vcc Fpp, Fod Twl Ttlh 0.125Vcc Tthl Tisu Tih Twh SDCLK (output) INPUT OUTPUT Todly (max) Vol=0.125Vcc, SD Card Interface Signals Timing Voh=0.75Vcc Todly (min) TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.55 TC6371AF Specification 5.3.4 System Interface Signal AC Characteristics Rev. 1.8 02/01/22 CLK32 AC Characteristics (VCC=3.0-3.6V, Ta=0-70C) Symbol CLK32 Tcyc32 Thigh32 Tlow32 t1d32 t1e32 CLK cycle time CLK High time CLK Low time Parameter Min Max Unit Notes 31 11 11 10 10 s s s ns ns Slew Rate, CLK32 Rising Edge Slew Rate, CLK32 Falling Edge CLK32 Timing Tcyc32 Tlow32 Thigh32 CLK32 t1e32 t1d32 Vcc-0.6 0.6 TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.56 TC6371AF Specification Rev. 1.8 02/01/22 6 Package outline TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.57 TC6371AF Specification Rev. 1.8 02/01/22 000707EAA1 * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. TOSHIBA CONFIDENTIAL TOTAL 58 PAGE NO.58 |
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